SK hynix unveiled at Intel AI Summit Seoul 2026 on Thursday (12) a shared memory pool architecture for artificial intelligence servers, developed in collaboration with Intel. The proposal replaces the current model — in which each server keeps its own memory — with dedicated racks of high-capacity memory shared by multiple servers running GPUs and CPUs.
How the shared pool works
The idea targets a specific bottleneck of agentic AI: the key-value cache (KV cache) used in multi-turn inference. When that cache does not fit in local memory, the system must discard it and recompute it, which delays the response. In SK hynix's design, servers keep their local memory and gain a shared pool on top: separate racks holding tens to hundreds of terabytes, connected to each other via RDMA (remote direct memory access) and, inside each rack, via CXL (Compute Express Link).
The internal test numbers
In an internal multi-turn inference test disclosed by the company, the average time to generate the first token was 80.76 seconds with the traditional eviction-and-recompute method, 33.56 seconds with the cache stored on an external SSD, and 15.45 seconds with remote DRAM over CXL — a reduction of about 81%, or 5.2x. The figures come from SK hynix itself and have not yet been independently validated: the company said the architecture will be validated with Intel, customers and other partners starting from the system-design phase.
In the presentation, SK hynix vice president Joo Young-pyo said that, as the era of agentic AI arrives, it is necessary to assess whether pressure on memory capacity and performance will ease or intensify — and argued for memory at the center of the system, with each compute device depositing and retrieving data as needed. He acknowledged that reading data from CXL-connected memory has higher latency than the local memory of GPUs and CPUs, but said the performance advantage over repeated recomputation remains significant.
What Intel announced at the same event
On Intel's side, the event also brought the company's AI roadmap and the K-AI Full-Stack alliance, with 23 South Korean companies and institutions, plus the Crescent Island inference GPU, which will have an Intel version with 160 GB of memory and partner versions of up to 480 GB. Geekiki already covered the event — read the story on the CPU demand forecast and the K-AI alliance.
The announcement comes at a time of strong pressure on the memory market, with AI demand pushing up DRAM and HBM prices. The shared memory pool is still a concept under validation, with no product or launch date: before it becomes reality, the connection specifications between the pool and the servers and the software ecosystem need to be developed, and the latency and reliability of shared memory over CXL need to be validated at data-center scale.
Featured image: SK hynix DDR5 Tall MRDIMM memory module on display at Computex 2025. Photo by 4300streetcar, via Wikimedia Commons.
Sources
- Crypto Briefing — SK Hynix and Intel explore shared memory pools to ease AI bottlenecks
- BigGo Finance — SK Hynix Unveils 'Memory Pool' Concept to Break Through GPU Wall, Co-Designed With Intel
- WEEX — Intel and SK Hynix Launch Solution to Break AI Inference Bottleneck
- Wisevoter — SK hynix Shows Shared Memory Design for AI Servers
Transparency: this article was produced with the help of artificial intelligence, based on cross-checking public sources on the internet, with editorial review. The performance results cited are SK hynix's internal tests, not yet independently validated, and the architecture presented is a concept under validation, not a launched product. Always consult the original sources listed above.
By Muse
