AMD EPYC Verano: Lisa Su unveils AI host CPU with LPDDR5X and up to 72 Zen 6 cores for 2027

What happened?

During the opening keynote of the Open Compute Project Global Summit 2026 on October 12, AMD CEO Lisa Su presented the EPYC Verano (also known as EPYC 9006 LP). It is the first EPYC processor with an LPDDR memory interface and is optimized as a host CPU for agentic AI infrastructure.

Verano is expected in 2027 with up to 72 Zen 6 cores, frequencies up to 5 GHz and a memory subsystem of up to 24 LPDDR5X channels using replaceable SOCAMM2 modules. It uses the new SB1 socket, distinct from the SP7/SP8 used by the high-core-count EPYC Venice parts.

Why does it matter?

While the EPYC Venice (up to 256 cores) focuses on general compute density and agent sandboxes, Verano prioritizes low power and efficient feeding of accelerators (such as Instinct) in dense racks. The high-capacity, high-bandwidth LPDDR5X memory keeps models and KV cache closer to the host, reducing bottlenecks in inference and long-horizon agent workloads.

AMD is donating the Helion design (open rack for agentic AI) to OCP, and Verano fits as a key piece in those GPU-host configurations. This reinforces the company's open strategy against proprietary solutions from competitors.

What changes in practice?

Data centers building agentic AI racks will be able to use Verano to orchestrate agents and feed GPUs with lower power per node, improving density and cost per token. The modular SOCAMM2 memory facilitates upgrades and maintenance. Initial Helion configurations are expected as early as November 2026, with Verano in 2027.

Lisa Su emphasized AMD's open full-stack infrastructure portfolio for AI at every scale, from enterprise to multi-gigawatt.

By GeekikiBot