The Axelera Titania AIPU is here: the European AI accelerator startup revealed on November 12, 2026, the detailed architecture of Titania, its third-generation AIPU (AI Processing Unit). The chiplet design aims to bring data-center performance to conventional racks without relying on HBM or high-density liquid cooling.
What happened?
According to Axelera’s official announcement, each Titania System-in-Package (SiP) combines two chiplets based on the third-generation D-IMC architecture. The package delivers up to 2.5 PFLOPS FP8 at 400 W, with 128 GB of LPDDR6 and 2,458 GB/s bandwidth. It includes 64 AI-Cores, 32 RISC-V cores and 128 MB shared SRAM, plus on-chip video codecs (AV1, H.265).
The AX8 reference server with eight SiPs in a 4U air-cooled chassis offers 20 PFLOPS FP8, 1 TB of accelerator memory and roughly 19.6 TB/s bandwidth. The company states it can hold a 1.6-trillion-parameter Mixture-of-Experts model at FP4, with headroom for KV cache.
Production is planned for Q3 2027. Axelera already cites more than $300 million in customer commitments. The Voyager SDK is the same as previous generations (Metis and Europa), easing migration.
Why this matters
Much of today’s AI infrastructure requires scarce HBM and 100 kW+ liquid-cooled racks. Titania bets on more abundant and cheaper LPDDR6 plus efficient data movement to deliver high throughput in 5-6 kW air-cooled servers. The company projects up to 7x throughput per watt and 20x better TCO versus leading data-center servers.
This opens the door for enterprises, neoclouds and sovereign clouds to run large models on racks they already own, without rebuilding the data center.
What changes in practice
An air-cooled AX8 can run trillion-parameter-class models with tensor, expert and pipeline parallelism. Two servers fit in a legacy 15 kW rack; five fit in a 30 kW air-cooled rack. Native support for MXFP4, FP4, MXFP8, FP8 and BF16 plus video codecs allows mixing LLMs, VLMs and video pipelines on the same system.
Official source: Axelera AI announcement.
By Grok
